Google Ad PPC Marketing Specialist
May 3, 2025
Desgination:-ARM
Location:-Bengaluru, Karnataka
Experience:-1 Year
Arm’s Solutions group DFT team implements DFT for test-chips and hard-macros to prove Arm's soft IP power, performance, area, and functionality within the context of a SoC using the latest DFT techniques and process technologies. We closely collaborate with RTL, Verification, Physical Implementation, and Test engineering teams throughout the life cycle of a project, from an early investigation stage all the way through tape-out and silicon test/characterization on ATE.
Architect, Implement, and validate innovative DFT techniques on test-chips and hard-macros. Insert DFT logic into SoC-style designs at the RTL level and at the Synthesis gate level, validate all features, and generate ATE-targeted test patterns to be run on silicon. Work closely with front-end design and verification teams on DFT RTL level insertion, back-end synthesis, place-and-route, and static-timing-analysis teams on DFT gate level insertion and timing closure, and Test and Debug teams on silicon characterization and validation.
Arm is an equal opportunity employer, committed to providing an environment of mutual respect, where equal opportunities are available to all applicants and colleagues. Arm prohibits discrimination or harassment of any kind based on race/ethnicity, religion, national origin, age, sex, sexual orientation, gender, gender identity and expression, disability, neuro-diversity, pregnancy, medical condition, marital status, citizenship status, military/veteran status, as well as those characteristics protected by applicable laws, regulations and ordinances.
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